Ultra High Density Integrated Composite Capacitor Design for CMOS

Technology No. 20160011
IP Status: Issued US Patent; Application #: 15/132,326

High Capacitance, Low Leakage, Requires Less Chip Area

An ultra-high density two-terminal integrated composite capacitor uses a parallel combination of metal oxide metal (MOM), metal oxide silicon (MOS) and metal insulator metal (MIM) capacitors physically laid over one another. This design both conserves area while providing capacitance density comparable to deep trench capacitors. The MOS capacitor, used in accumulation mode, offers high capacitance and low leakage. Floating the MOS source and drain terminals significantly reduces overall system leakage. This capacitor can be used in general-purpose, mixed-signal blocks as well as regular CMOS processes.

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More Effective than Deep Trench Capacitors

Custom-fabricated deep trench capacitors are expensive and not available in regular, mixed-signal fabrication processes. This ultra-dense capacitor offers a more cost effective alternative to such specialized and expensive integrated capacitors while producing comparable capacitance density. In addition, it saves active chip area (8X) in regular CMOS process and reduces leakage wastage by 40 times.

BENEFITS AND FEATURES:

  • Devices benefit from ultra high density
  • Three capacitors stacked one over another
  • MOM (Metal Oxide Metal), MOS (Metal Oxide Silicon) and MIM (Metal Insulator Metal) capacitors
  • Power loss leakage decreased by 40X
  • Saves active chip area by eight (8) times
  • Floating MOS capacitor source and drain

APPLICATIONS:

  • General-purpose, mixed signal blocks
  • CMOS processes
  • Switched capacitor DC-DC converters
  • Switched capacitor amplifiers in ADCs
  • Power converters

Phase of Development - a capacitor was fabricated in a 65nm CMOS process

Researchers
Ramesh Harjani, PhD
Professor, Department of Electrical and Computer Engineering
External Link (ece.umn.edu)
Rakesh Kumar Palani
Staff Scientist, MaxLinear
External Link (www.linkedin.com)
Saurabh Chaubey
Research Assistant, Department of Electrical and Computer Engineering
External Link (www.linkedin.com)

Publications
Fully tunable software defined DC-DC converter with 3000X output current & 4X output voltage ranges
IEEE Xplore 2017, 27 July 2017

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    Product brochure
    Ultra High Density Integrated Composite Capacitor Design for CMOS.pdf
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