Highly Linear Circuits
Provides high linearity circuits
Circuit linearity is improved by canceling, in part or entirely, at least one significant harmonic from a primary circuit’s output by using an identical auxiliary circuit’s output. This novel method provides a primary circuit and at least one auxiliary circuit that is substantially functionally identical to the primary circuit. The technique cancels at least a portion (and preferably, substantially all of) at least one significant harmonic of the primary circuit (e.g., the 3rd harmonic) and then applies input signals to the primary and auxiliary circuits, resulting in output signals with different amplitudes from each circuit. At least a portion of the harmonic of the first output signal is cancelled using the second output signal. The technology provides high linearity circuits that can be used in receivers and transmitters of communication systems, analog-to-digital (A/D) conversion systems, analog circuits or circuits designed with digital CMOS processes.
Improved SFDR and Reduced Power Consumption
High linearity circuits are required in many systems, but circuit non-linearity causes many problems. One problem is limiting a system’s spurious free dynamic range (SFDR), which in turn limits the system’s accuracy. Generally, high performance and high efficiency are conflicting design considerations, so the highly linear design in this technology not only improves a circuit’s SFDR, and therefore its accuracy, but also reduces power consumption, important when considering the portable nature of cellular communications systems.
BENEFITS AND FEATURES:
- High linearity circuits
- Improved spurious free dynamic range (SFDR)
- Reduction in power consumption
- Primary circuit and at least one (identical) auxiliary circuit
- A least a portion of a harmonic (e.g., the 3rd harmonic) of the first output signal is cancelled using the second output signal
- Communication systems
- Analog-to-digital conversion systems
- Analog circuits (e.g., low-noise amplifiers)
- Circuits designed with digital CMOS processes
Phase of Development - Proof of Concept
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Researchers: Yongwang Ding, PhD
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