Design of ultrathin nanowire-based integrated via for CMOS application in millimeter-wave frequencies
A device for millimeter-wave frequency CMOS applications with decreased loss made with bundles of integrated nanowires.
Technology No. 2021-161
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IP Status: US Patent Issued; Patent No. 12,142,805
Working prototypes have been developed.
Applications
- High-Frequency 3D Integrated Circuits
- Millimeter-Wave Communications
- Submillimeter-Wave Communications
Technology Overview
Future millimeter- and submillimeter-wave communication systems are the key enablers to Internet of Things technology, autonomous vehicles, and low-power cube-satellites, however, at these high frequencies, loss from vias becomes prohibitive. Researchers at the University of Minnesota have developed a device integrating bundles of nanowires in an integrated via structure to decrease power loss. This device utilizes the decreased via thickness (1.2 µm vs 50-250 µm) to reduce insertion loss of a test line with two G-S-G vias at 40 GHz from 0.21-0.93 dB down to 0.095 dB.
Phase of Development
TRL: 3-4Working prototypes have been developed.
Desired Partnerships
This technology is now available for:- License
- Sponsored research
- Co-development
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Press Releases
University of Minnesota College of Science & Engineering January 29, 2021Researchers
- Rhonda Franklin, PhD Professor, Department of Electrical and Computer Engineering
- Bethanie Stadler, PhD Professor, Department of Electrical and Computer Engineering
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swap_vertical_circlelibrary_booksReferences (1)
- Y. Zhang, J. Um, B. Stadler, R. Henderson and R. Franklin (2021), Study of Nanowire-Based Integrated via Technology for CMOS Application in Millimeter-Wave Frequencies, IEEE Microwave and Wireless Components Letters, 31, 693-696
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swap_vertical_circlecloud_downloadSupporting documents (1)Product brochureDesign of ultrathin nanowire-based integrated via for CMOS application in millimeter-wave frequencies.pdf